Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template
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: 2014DOI: 10.1109/TVLSI.2013.2257187
Keyword(s): application specific integrated circuits,asynchronous circuits,logic design,pipeline processing,ISCAS benchmarks,asynchronous ASIC flow Proteus,asynchronous design theory,asynchronous multilevel single-track pipeline template,bundled-data templates,control logic sharing,four-phase templates,logic per pipeline stage,lower latency,multiple levels,single-track handshaking,targets medium to high performance applications,1-of-N channels,Asynchronous design,single-track handshaking
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Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template
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| contributor author | Golani, Pankaj | |
| contributor author | Beerel, Peter /A/. | |
| date accessioned | 2020-03-12T18:23:43Z | |
| date available | 2020-03-12T18:23:43Z | |
| date issued | 2014 | |
| identifier issn | 1063-8210 | |
| identifier other | 6519947.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/957021 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7989189 | |
| subject keywords | application specific integrated circuits | |
| subject keywords | asynchronous circuits | |
| subject keywords | logic design | |
| subject keywords | pipeline processing | |
| subject keywords | ISCAS benchmarks | |
| subject keywords | asynchronous ASIC flow Proteus | |
| subject keywords | asynchronous design theory | |
| subject keywords | asynchronous multilevel single-track pipeline template | |
| subject keywords | bundled-data templates | |
| subject keywords | control logic sharing | |
| subject keywords | four-phase templates | |
| subject keywords | logic per pipeline stage | |
| subject keywords | lower latency | |
| subject keywords | multiple levels | |
| subject keywords | single-track handshaking | |
| subject keywords | targets medium to high performance applications | |
| subject keywords | 1-of-N channels | |
| subject keywords | Asynchronous design | |
| subject keywords | single-track handshaking | |
| identifier doi | 10.1109/TVLSI.2013.2257187 | |
| journal title | Very Large Scale Integration (VLSI) Systems, IEEE Transactions on | |
| journal volume | 22 | |
| journal issue | 4 | |
| filesize | 986715 | |
| citations | 0 |