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Classification of Texture Using Gray Level Co-occurrence Matrix and Self-Organizing Map

contributor authorThakare, V.S. , Patil, N.N.
date accessioned2020-03-12T19:31:11Z
date available2020-03-12T19:31:11Z
date issued2014
identifier other6745402.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/980424?show=full
formatgeneral
languageEnglish
publisherIEEE
titleClassification of Texture Using Gray Level Co-occurrence Matrix and Self-Organizing Map
typeConference Paper
contenttypeMetadata Only
identifier padid8094740
subject keywordsCMOS integrated circuits
subject keywordsburied layers
subject keywordsintegrated circuit modelling
subject keywordsleakage currents
subject keywordslow-power electronics
subject keywordsTCAD simulation
subject keywordsburied oxide
subject keywordschannel length variation
subject keywordsleakage current reduction
subject keywordslow power UTBB FDSOI CMOS device
subject keywordssubthreshold slope
subject keywordsthreshold voltage
subject keywordsCMOS integrated circuits
subject keywordsCapacitance
subject keywordsLogic gates
subject keywordsMOS devices
subject keywordsSemiconductor device modeling
subject keywordsSubstrates
subject keywordsThreshold voltage
subject keywordsChannel Length
subject keywordsFully Depleted (FD)
subject keywordsSilicon on Insulator (SOI)
subject keywordsSimulation
subject keywordsSub-threshold slope
subject keywordsThresh
identifier doi10.1109/ICGCCEE.2014.6922240
journal titlelectronic Systems, Signal Processing and Computing Technologies (ICESC), 2014 International Conferen
filesize215468
citations0


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