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Minitaur, an Event-Driven FPGA-Based Spiking Network Accelerator

contributor authorNeil, Dan
contributor authorShih-Chii Liu
date accessioned2020-03-12T18:38:56Z
date available2020-03-12T18:38:56Z
date issued2014
identifier issn1063-8210
identifier other6701396.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/965554?show=full
formatgeneral
languageEnglish
publisherIEEE
titleMinitaur, an Event-Driven FPGA-Based Spiking Network Accelerator
typeJournal Paper
contenttypeMetadata Only
identifier padid7999231
subject keywordsfield programmable gate arrays
subject keywordsneural nets
subject keywordsCPU
subject keywordsMNIST handwritten digit classification
subject keywordsMinitaur
subject keywordsevent-driven FPGA
subject keywordsevent-driven neural network accelerator
subject keywordsfield-programmable gate array-based system
subject keywordsneural networks
subject keywordsnewsgroups classification data
subject keywordsrobotics
subject keywordsspiking deep network
subject keywordsspiking network accelerator
subject keywordsBiological neural networks
subject keywordsClocks
subject keywordsComputer architecture
subject keywordsField programmable gate arrays
subject keywordsMathematical model
subject keywordsNeurons
subject keywordsPerformance evaluation
subject keywordsDeep belief networks
subject keywordsfield programmable a
identifier doi10.1109/TVLSI.2013.2294916
journal titleVery Large Scale Integration (VLSI) Systems, IEEE Transactions on
journal volume22
journal issue12
filesize1795383
citations0


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