A Novel Algorithmic Approach to Aid Post-Silicon Delay Measurement and Clock Tuning
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Year
: 2014DOI: 10.1109/TC.2012.275
Keyword(s): clocks,algorithmic approach,clock tuning buffers,clock tuning elements,clock vernier devices,electrical effects,high-performance designs,post-silicon clock tuning,post-silicon delay measurement,smart pruning techniques,Algorithm design and analysis,Clocks,Delay,Frequency measurement,Silicon,Tuning,CVD configuration,CVD insertion,Clock Vernier Devices (CVDs),Post-silicon clock tuning,speedpaths
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A Novel Algorithmic Approach to Aid Post-Silicon Delay Measurement and Clock Tuning
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| contributor author | Lak, Zahra | |
| contributor author | Nicolici, Nicola | |
| date accessioned | 2020-03-12T18:20:55Z | |
| date available | 2020-03-12T18:20:55Z | |
| date issued | 2014 | |
| identifier issn | 0018-9340 | |
| identifier other | 6361380.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/955526?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Novel Algorithmic Approach to Aid Post-Silicon Delay Measurement and Clock Tuning | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7987195 | |
| subject keywords | clocks | |
| subject keywords | algorithmic approach | |
| subject keywords | clock tuning buffers | |
| subject keywords | clock tuning elements | |
| subject keywords | clock vernier devices | |
| subject keywords | electrical effects | |
| subject keywords | high-performance designs | |
| subject keywords | post-silicon clock tuning | |
| subject keywords | post-silicon delay measurement | |
| subject keywords | smart pruning techniques | |
| subject keywords | Algorithm design and analysis | |
| subject keywords | Clocks | |
| subject keywords | Delay | |
| subject keywords | Frequency measurement | |
| subject keywords | Silicon | |
| subject keywords | Tuning | |
| subject keywords | CVD configuration | |
| subject keywords | CVD insertion | |
| subject keywords | Clock Vernier Devices (CVDs) | |
| subject keywords | Post-silicon clock tuning | |
| subject keywords | speedpaths | |
| identifier doi | 10.1109/TC.2012.275 | |
| journal title | Computers, IEEE Transactions on | |
| journal volume | 63 | |
| journal issue | 5 | |
| filesize | 1512703 | |
| citations | 0 |