PBTI-Induced Random Timing Jitter in Circuit-Speed Random Logic
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Year
: 2014DOI: 10.1109/TED.2014.2357675
Keyword(s): logic circuits,logic testing,random sequences,timing circuits,timing jitter,PBTI induced random timing jitter,bias temperature instability,circuit speed random logic,device level reliability data,device level testing,eye diagram approach,pseudorandom bit sequence,real random logic circuits,real world digital logic circuits,Current measurement,Degradation,Jitter,Logic gates,Stress,Stress measurement,Timing,Jitter,positive bias temperature instability (PBTI),pseudorandom bit
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PBTI-Induced Random Timing Jitter in Circuit-Speed Random Logic
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| contributor author | Jiwu Lu | |
| contributor author | Jiao, Guangfan | |
| contributor author | Vaz, C. | |
| contributor author | Campbell, J.P. | |
| contributor author | Ryan, J.T. | |
| contributor author | Cheung, K.P. | |
| contributor author | Bersuker, Gennadi | |
| contributor author | Young, Cliff | |
| date accessioned | 2020-03-13T00:23:30Z | |
| date available | 2020-03-13T00:23:30Z | |
| date issued | 2014 | |
| identifier issn | 0018-9383 | |
| identifier other | 6906250.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1144982 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | PBTI-Induced Random Timing Jitter in Circuit-Speed Random Logic | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8327674 | |
| subject keywords | logic circuits | |
| subject keywords | logic testing | |
| subject keywords | random sequences | |
| subject keywords | timing circuits | |
| subject keywords | timing jitter | |
| subject keywords | PBTI induced random timing jitter | |
| subject keywords | bias temperature instability | |
| subject keywords | circuit speed random logic | |
| subject keywords | device level reliability data | |
| subject keywords | device level testing | |
| subject keywords | eye diagram approach | |
| subject keywords | pseudorandom bit sequence | |
| subject keywords | real random logic circuits | |
| subject keywords | real world digital logic circuits | |
| subject keywords | Current measurement | |
| subject keywords | Degradation | |
| subject keywords | Jitter | |
| subject keywords | Logic gates | |
| subject keywords | Stress | |
| subject keywords | Stress measurement | |
| subject keywords | Timing | |
| subject keywords | Jitter | |
| subject keywords | positive bias temperature instability (PBTI) | |
| subject keywords | pseudorandom bit | |
| identifier doi | 10.1109/TED.2014.2357675 | |
| journal title | Electron Devices, IEEE Transactions on | |
| journal volume | 61 | |
| journal issue | 11 | |
| filesize | 1304071 | |
| citations | 0 |