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A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology

contributor authorGangasani, Gautam R.
contributor authorChun-Ming Hsu
contributor authorBulzacchelli, John F.
contributor authorBeukema, Troy
contributor authorKelly, Wayne
contributor authorXu, Hui H.
contributor authorFreitas, David
contributor authorPrati, Andrea
contributor authorGardellini, Daniele
contributor authorReutemann, Robert
contributor authorCervelli, Giovanni
contributor authorHertle, Juergen
contributor authorBaecher, Matthew
contributor authorGarlett, Jon
contributor authorFrancese, Pier-Andrea
contributor authorEwen, John F.
contributor authorHanson, D.
contributor authorStoraska, Daniel W.
contributor authorMeghelli, Mounir
date accessioned2020-03-13T00:17:17Z
date available2020-03-13T00:17:17Z
date issued2014
identifier issn0018-9200
identifier other6872604.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1141172?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleA 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology
typeJournal Paper
contenttypeMetadata Only
identifier padid8323601
subject keywordsCMOS integrated circuits
subject keywordsclock and data recovery circuits
subject keywordserror statistics
subject keywordsfeedforward
subject keywordsintegrated circuit design
subject keywordsjitter
subject keywordslow-power electronics
subject keywordssilicon-on-insulator
subject keywordstransceivers
subject keywordsCDR
subject keywordsDFE transceiver
subject keywordsFFE
subject keywordsFFR scheme
subject keywordsSOI CMOS technology
subject keywordsSi
subject keywordsbackplane transceiver
subject keywordsbit rate 32 Gbit/s
subject keywordsbit-error rate
subject keywordsclock and data recovery
subject keywordsdecision feedback
subject keywordsfeed-forward equalization
subject keywordshigh-frequency jitter tolerance
subject keywordson-chip AC-coupling network
subject keywordspassive feed-forward restore scheme
subject keywordspattern-dependent base
identifier doi10.1109/JSSC.2014.2340574
journal titleSolid-State Circuits, IEEE Journal of
journal volume49
journal issue11
filesize4058521
citations1


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