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Resistorless BJT bias and curvature compensation circuit at 3.4 nW for CMOS bandgap voltage references

contributor authorMattia, Oscar E.
contributor authorKlimach, Hamilton
contributor authorBampi, Sergio
date accessioned2020-03-13T00:09:16Z
date available2020-03-13T00:09:16Z
date issued2014
identifier issn0013-5194
identifier other6836719.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1136339?show=full
formatgeneral
languageEnglish
publisherIET
titleResistorless BJT bias and curvature compensation circuit at 3.4 nW for CMOS bandgap voltage references
typeJournal Paper
contenttypeMetadata Only
identifier padid8318008
subject keywordsCMOS integrated circuits
subject keywordsbipolar transistors
subject keywordscompensation
subject keywordslow-power electronics
subject keywordsreference circuits
subject keywordsBGRs
subject keywordscircuit analytical behaviour
subject keywordscurrent 3.5 nA
subject keywordscurvature compensation circuit
subject keywordslinear temperature dependence
subject keywordsnanoampere current consumption range
subject keywordspower 3.4 nW
subject keywordsresistorless BJT bias
subject keywordsresistorless bipolar junction transistor
subject keywordssize 0.18 mum
subject keywordstemperature 27 degC
subject keywordstemperature 293 K to 298 K
subject keywordsultra-low-power CMOS bandgap voltage references
subject keywordsvoltage 1 V
subject keywordsvoltage 550 mV
identifier doi10.1049/el.2013.3417
journal titleElectronics Letters
journal volume50
journal issue12
filesize282484
citations1


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