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A Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores

contributor authorMarques, Nicolas
contributor authorRabah, Hassan
contributor authorDabellani, Eric
contributor authorWeber, Simon
date accessioned2020-03-12T23:57:54Z
date available2020-03-12T23:57:54Z
date issued2014
identifier issn1943-0663
identifier other6797858.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1129645?show=full
formatgeneral
languageEnglish
publisherIEEE
titleA Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores
typeJournal Paper
contenttypeMetadata Only
identifier padid8310022
subject keywordsembedded systems
subject keywordsfield programmable gate arrays
subject keywordsindustrial property
subject keywordsreconfigurable architectures
subject keywordsresource allocation
subject keywordsFPGA
subject keywordsadaptable partition
subject keywordsadaptable reconfigurable partitions design
subject keywordsadaptive computation
subject keywordscommunication infrastructure
subject keywordsembedded reconfigurable systems
subject keywordsfield programmable gate array
subject keywordsintellectual property cores
subject keywordspartial dynamic reconfiguration
subject keywordsreconfigurable modules placement
subject keywordsresource utilization
subject keywordstiled reconfigurable architecture
subject keywordsvariable-sized IP cores
subject keywordsData mining
identifier doi10.1109/LES.2014.2317254
journal titleEmbedded Systems Letters, IEEE
journal volume6
journal issue3
filesize635090
citations0


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