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Now showing items 1-8 of 8

Spin memory shows its might [News]

Type: Journal Paper

Author : Courtland, Rachel

Publisher: IEEE

Year: 2014

STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies

Type: Journal Paper

Author : Jisu Kim; Kyungho Ryu; Jung Pill Kim; Kang, S.H.; Seong-Ook Jung

Publisher: IEEE

Year: 2014

Hardware primitives for the synthesis of multithreaded elastic systems

Type: Conference Paper

Publisher: IEEE

Year: 2014

Optimization Scheme to Minimize Reference Resistance Distribution of Spin-Transfer-Torque MRAM

Type: Journal Paper

Author : Kejie Huang; Ning Ning; Yong Lian

Publisher: IEEE

Year: 2014

Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm

Type: Conference Paper

Author : Leyva, P.; Domenech-Asensi, G.; Garrigos, J.; Illade-Quinteiro, J.; Brea, V.M.; Lopez, P.; Cabello, D.

Publisher: IEEE

Year: 2014

Write-Optimized STT-MRAM Bit-Cells Using Asymmetrically Doped Transistors

Type: Journal Paper

Author : Choday, Sri Harsha; Gupta, Suneet K.; Roy, Kaushik

Publisher: IEEE

Year: 2014

Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

Type: Journal Paper

Author : Xuanyao Fong; Yusung Kim; Choday, Sri Harsha; Roy, Kaushik

Publisher: IEEE

Year: 2014

Popular Items or Niche Items: Flexible Recommendation Using Cosine Patterns

Type: Conference Paper

Author : Wang, Yaqiong; Wu, Junjie; Wu, Zhiang; Yuan, Hua; Zhang, Xu

Publisher: IEEE

Year: 2014

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Spin memory shows its might [News]

STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies

Hardware primitives for the synthesis of multithreaded elastic systems

Optimization Scheme to Minimize Reference Resistance Distribution of Spin-Transfer-Torque MRAM

Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm

Write-Optimized STT-MRAM Bit-Cells Using Asymmetrically Doped Transistors

Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

Popular Items or Niche Items: Flexible Recommendation Using Cosine Patterns

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Spin memory shows its might [News]

STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies

Hardware primitives for the synthesis of multithreaded elastic systems

Optimization Scheme to Minimize Reference Resistance Distribution of Spin-Transfer-Torque MRAM

Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm

Write-Optimized STT-MRAM Bit-Cells Using Asymmetrically Doped Transistors

Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

Popular Items or Niche Items: Flexible Recommendation Using Cosine Patterns