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Improving CMOS open defect coverage using hazard activated tests

contributor authorChao Han , Singh, A.D.
date accessioned2020-03-12T19:46:35Z
date available2020-03-12T19:46:35Z
date issued2014
identifier other6818740.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/989675?show=full
formatgeneral
languageEnglish
publisherIEEE
titleImproving CMOS open defect coverage using hazard activated tests
typeConference Paper
contenttypeMetadata Only
identifier padid8105934
subject keywordsClocks
subject keywordsCurrent transformers
subject keywordsEducational institutions
subject keywordsModulation
subject keywordsResonant frequency
subject keywordsTransformer cores
subject keywordsWindings
identifier doi10.1109/AUPEC.2014.6966600
journal titleLSI Test Symposium (VTS), 2014 IEEE 32nd
filesize264741
citations0


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