Analysis of Power in Dynamic Comparators
نویسنده:
, , , , ,سال
: 2013
چکیده: The need for ultra low-power, area efficient and high
speed analog-to-digital converters (ADCs) is pushing towards
the use of dynamic comparators to maximize speed, power
efficiency and re-configurability. In this paper an analysis on the
power of the dynamic comparators will be presented and
analytical expressions are derived. From the analytical
expressions, designers can obtain an intuition about the main
contributors to the comparator power consumption and also
fully explore the tradeoffs in dynamic comparator design such
as offset voltage, power and speed. To validate the analytical
expressions, the power is first derived analytically and then will
be compared to the result of simulating a conventional dynamic
comparator in 0.18µm CMOS. A good agreement between these
two verifies the effectiveness of the presented analysis.
speed analog-to-digital converters (ADCs) is pushing towards
the use of dynamic comparators to maximize speed, power
efficiency and re-configurability. In this paper an analysis on the
power of the dynamic comparators will be presented and
analytical expressions are derived. From the analytical
expressions, designers can obtain an intuition about the main
contributors to the comparator power consumption and also
fully explore the tradeoffs in dynamic comparator design such
as offset voltage, power and speed. To validate the analytical
expressions, the power is first derived analytically and then will
be compared to the result of simulating a conventional dynamic
comparator in 0.18µm CMOS. A good agreement between these
two verifies the effectiveness of the presented analysis.
کلیدواژه(گان): voltage comparators,power analysis
کالکشن
:
-
آمار بازدید
Analysis of Power in Dynamic Comparators
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| contributor author | سمانه بابایان مشهدی | en |
| contributor author | مجتبی دلیری رضاقلی قشلاقی | en |
| contributor author | رضا لطفی | en |
| contributor author | Samaneh Babayan | fa |
| contributor author | mojtaba Daliri Reza Gholi Gheshlaghi | fa |
| contributor author | Reza Lotfi | fa |
| date accessioned | 2020-06-06T14:13:00Z | |
| date available | 2020-06-06T14:13:00Z | |
| date copyright | 5/14/2013 | |
| date issued | 2013 | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/3387306 | |
| description abstract | The need for ultra low-power, area efficient and high speed analog-to-digital converters (ADCs) is pushing towards the use of dynamic comparators to maximize speed, power efficiency and re-configurability. In this paper an analysis on the power of the dynamic comparators will be presented and analytical expressions are derived. From the analytical expressions, designers can obtain an intuition about the main contributors to the comparator power consumption and also fully explore the tradeoffs in dynamic comparator design such as offset voltage, power and speed. To validate the analytical expressions, the power is first derived analytically and then will be compared to the result of simulating a conventional dynamic comparator in 0.18µm CMOS. A good agreement between these two verifies the effectiveness of the presented analysis. | en |
| language | English | |
| title | Analysis of Power in Dynamic Comparators | en |
| type | Conference Paper | |
| contenttype | External Fulltext | |
| subject keywords | voltage comparators | en |
| subject keywords | power analysis | en |
| identifier link | https://profdoc.um.ac.ir/paper-abstract-1039264.html | |
| conference title | 21st Iranian Conference on Electrical Engineering, ICEE 2013 | en |
| conference location | Mashhad | fa |
| identifier articleid | 1039264 |