Concept Maps Construction Based on Student-Problem Chart

نویسنده:
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ناشر:
سال
: 2014
شناسه الکترونیک: 10.1109/ICCSP.2014.6949897
کلیدواژه(گان): CMOS memory circuits,SRAM chips,leakage currents,10T transistor models,6T transistor models,8T transistor models,Analog environment Virtuoso cadence,CMOS SRAM cell,CMOS digital integrated circuits,leakage current,leakage power reduction,size 180 nm,size 45 nm,size 90 nm,sleep transistors,write operation,CMOS integrated circuits,Integrated circuit modeling,Load modeling,SRAM cells,Switching circuits,Transistors,6T-SRAM cell,8T and 10T transistor models,Leakage current and
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