Concept Maps Construction Based on Student-Problem Chart
Publisher:
Year
: 2014DOI: 10.1109/ICCSP.2014.6949897
Keyword(s): CMOS memory circuits,SRAM chips,leakage currents,10T transistor models,6T transistor models,8T transistor models,Analog environment Virtuoso cadence,CMOS SRAM cell,CMOS digital integrated circuits,leakage current,leakage power reduction,size 180 nm,size 45 nm,size 90 nm,sleep transistors,write operation,CMOS integrated circuits,Integrated circuit modeling,Load modeling,SRAM cells,Switching circuits,Transistors,6T-SRAM cell,8T and 10T transistor models,Leakage current and
Collections
:
-
Statistics
Concept Maps Construction Based on Student-Problem Chart
Show full item record
| contributor author | Shieh, Jiann Cherng | |
| contributor author | Yang, Yi Ting | |
| date accessioned | 2020-03-12T20:55:15Z | |
| date available | 2020-03-12T20:55:15Z | |
| date issued | 2014 | |
| identifier other | 6913317.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1030439?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Concept Maps Construction Based on Student-Problem Chart | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8155834 | |
| subject keywords | CMOS memory circuits | |
| subject keywords | SRAM chips | |
| subject keywords | leakage currents | |
| subject keywords | 10T transistor models | |
| subject keywords | 6T transistor models | |
| subject keywords | 8T transistor models | |
| subject keywords | Analog environment Virtuoso cadence | |
| subject keywords | CMOS SRAM cell | |
| subject keywords | CMOS digital integrated circuits | |
| subject keywords | leakage current | |
| subject keywords | leakage power reduction | |
| subject keywords | size 180 nm | |
| subject keywords | size 45 nm | |
| subject keywords | size 90 nm | |
| subject keywords | sleep transistors | |
| subject keywords | write operation | |
| subject keywords | CMOS integrated circuits | |
| subject keywords | Integrated circuit modeling | |
| subject keywords | Load modeling | |
| subject keywords | SRAM cells | |
| subject keywords | Switching circuits | |
| subject keywords | Transistors | |
| subject keywords | 6T-SRAM cell | |
| subject keywords | 8T and 10T transistor models | |
| subject keywords | Leakage current and | |
| identifier doi | 10.1109/ICCSP.2014.6949897 | |
| journal title | dvanced Applied Informatics (IIAIAAI), 2014 IIAI 3rd International Conference on | |
| filesize | 259563 | |
| citations | 0 |