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Enhanced Performance of Single Poly-Silicon EEPROM Cell With a Tungsten Finger Coupling Structure by Full CMOS Process

Type: Journal Paper

Author : Chih-Ping Chung; Kuei-Shu Chang-Liao; Chun-Yuan Chen

Publisher: IEEE

Year: 2014

Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel

Type: Journal Paper

Author : Chun-Yuan Chen; Kuei-Shu Chang-Liao; Li-Jung Liu; Wei-Chieh Chen; Tien-Ko Wang

Publisher: IEEE

Year: 2014

Profiling of Channel-Hot-Carrier Stress-Induced Trap Distributions Along Channel and Gate Dielectric in High-<formula formulatype="inline"> <img src="/images/tex/348.gif" alt="k"> </formula> Gated MOSFETs by a Modified Charge Pumping Technique

Type: Journal Paper

Author : Chun-Chang Lu; Kuei-Shu Chang-Liao; Che-Hao Tsao; Tien-Ko Wang; Hsueh-Chao Ko; Yao-Tung Hsu

Publisher: IEEE

Year: 2014

Improved electrical characteristics high-k gated MOS devices with in-situ remote plasma treatment in atomic layer deposition

Type: Journal Paper

Author : Chen-Chien Li; Kuei-Shu Chang-Liao; Chung-Hao Fu; Tsung-Lin Hsieh; Li-Ting Chen; Yu-Liang Liao; Chun-Chang Lu; Tien-Ko Wang

Year: 2013

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Improved Electrical Characteristics of Ge MOS Devices With High Oxidation State in <inline-formula> <img src="/images/tex/21682.gif" alt="{\\rm HfGeO}_{\\rm x}"> </inline-formula> Interfacial Layer Formed by <italic>In Situ</italic> Desorption

Type: Journal Paper

Author : Chen-Chien Li; Kuei-Shu Chang-Liao; Li-Jung Liu; Tzu-Min Lee; Chung-Hao Fu; Ting-Ching Chen; Jen-Wei Cheng; Chun-Chang Lu; Tien-Ko Wang

Publisher: IEEE

Year: 2014

An Ultralow EOT Ge MOS Device With Tetragonal HfO2 and High Quality Hf<italic>x</italic>Ge<italic>y</italic>O Interfacial Layer

Type: Journal Paper

Author : Chung-Hao Fu; Kuei-Shu Chang-Liao; Li-Jung Liu; Chen-Chien Li; Ting-Ching Chen; Jen-Wei Cheng; Chun-Chang Lu

Publisher: IEEE

Year: 2014

Electrical and physical characteristics of high-k gated MOSFETs with in-situ H2O and O2 plasma formed interfacial layer

Type: Journal Paper

Author : Yan-Lin Li; Kuei-Shu Chang-Liao; Chen-Chien Li; Li-Ting Chen; Tzu-Hsiang Su; Yu-Wei Chang; Ting-Chun Chen; Chia-Chi Tsai; Chia-Hung Kao; Hao-Ting Feng; Yao-Jen Lee

Year: 2015

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Enhanced Performance of Single Poly-Silicon EEPROM Cell With a Tungsten Finger Coupling Structure by Full CMOS Process

Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel

Profiling of Channel-Hot-Carrier Stress-Induced Trap Distributions Along Channel and Gate Dielectric in High-<formula formulatype="inline"> <img src="/images/tex/348.gif" alt="k"> </formula> Gated MOSFETs by a Modified Charge Pumping Technique

Improved electrical characteristics high-k gated MOS devices with in-situ remote plasma treatment in atomic layer deposition

Improved Electrical Characteristics of Ge MOS Devices With High Oxidation State in <inline-formula> <img src="/images/tex/21682.gif" alt="{\\rm HfGeO}_{\\rm x}"> </inline-formula> Interfacial Layer Formed by <italic>In Situ</italic> Desorption

An Ultralow EOT Ge MOS Device With Tetragonal HfO<sub>2</sub> and High Quality Hf<sub><italic>x</italic></sub>Ge<sub><italic>y</italic></sub>O Interfacial Layer

Electrical and physical characteristics of high-k gated MOSFETs with in-situ H2O and O2 plasma formed interfacial layer

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Enhanced Performance of Single Poly-Silicon EEPROM Cell With a Tungsten Finger Coupling Structure by Full CMOS Process

Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel

Profiling of Channel-Hot-Carrier Stress-Induced Trap Distributions Along Channel and Gate Dielectric in High-<formula formulatype="inline"> <img src="/images/tex/348.gif" alt="k"> </formula> Gated MOSFETs by a Modified Charge Pumping Technique

Improved electrical characteristics high-k gated MOS devices with in-situ remote plasma treatment in atomic layer deposition

Improved Electrical Characteristics of Ge MOS Devices With High Oxidation State in <inline-formula> <img src="/images/tex/21682.gif" alt="{\\rm HfGeO}_{\\rm x}"> </inline-formula> Interfacial Layer Formed by <italic>In Situ</italic> Desorption

An Ultralow EOT Ge MOS Device With Tetragonal HfO<sub>2</sub> and High Quality Hf<sub><italic>x</italic></sub>Ge<sub><italic>y</italic></sub>O Interfacial Layer

Electrical and physical characteristics of high-k gated MOSFETs with in-situ H2O and O2 plasma formed interfacial layer