Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel
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Year
: 2014DOI: 10.1109/LED.2014.2348714
Keyword(s): Ge-Si alloys,elemental semiconductors,flash memories,nanowires,random-access storage,silicon,tunnelling,3D nonvolatile memory application,CT,NW,Si-SiGe,buried channel,enhanced operation characteristics,polySi nanowire charge-trapping flash memory device,polycrystalline silicon,retention performances,tunneling layer,Ash,Logic gates,Performance evaluation,Programming,Silicon germanium,Tunneling,3D NVM,SiGe buried channel,charge-trapping (CT) flash memory,poly-Si,siGe bur
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Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel
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| contributor author | Chun-Yuan Chen | |
| contributor author | Kuei-Shu Chang-Liao | |
| contributor author | Li-Jung Liu | |
| contributor author | Wei-Chieh Chen | |
| contributor author | Tien-Ko Wang | |
| date accessioned | 2020-03-13T00:21:33Z | |
| date available | 2020-03-13T00:21:33Z | |
| date issued | 2014 | |
| identifier issn | 0741-3106 | |
| identifier other | 6894156.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1143756 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8326394 | |
| subject keywords | Ge-Si alloys | |
| subject keywords | elemental semiconductors | |
| subject keywords | flash memories | |
| subject keywords | nanowires | |
| subject keywords | random-access storage | |
| subject keywords | silicon | |
| subject keywords | tunnelling | |
| subject keywords | 3D nonvolatile memory application | |
| subject keywords | CT | |
| subject keywords | NW | |
| subject keywords | Si-SiGe | |
| subject keywords | buried channel | |
| subject keywords | enhanced operation characteristics | |
| subject keywords | polySi nanowire charge-trapping flash memory device | |
| subject keywords | polycrystalline silicon | |
| subject keywords | retention performances | |
| subject keywords | tunneling layer | |
| subject keywords | Ash | |
| subject keywords | Logic gates | |
| subject keywords | Performance evaluation | |
| subject keywords | Programming | |
| subject keywords | Silicon germanium | |
| subject keywords | Tunneling | |
| subject keywords | 3D NVM | |
| subject keywords | SiGe buried channel | |
| subject keywords | charge-trapping (CT) flash memory | |
| subject keywords | poly-Si | |
| subject keywords | siGe bur | |
| identifier doi | 10.1109/LED.2014.2348714 | |
| journal title | Electron Device Letters, IEEE | |
| journal volume | 35 | |
| journal issue | 10 | |
| filesize | 500891 | |
| citations | 0 |