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RISOptimization of Test Pin-Count, Test Scheduling, and Test Access for NoC-Based Multicore SoCs
Publisher: IEEE
Year: 2014
Retiming for Delay Recovery After DfT Insertion on Interdie Paths in 3-D ICs
Publisher: IEEE
Year: 2014
Contactless Pre-Bond TSV Test and Diagnosis Using Ring Oscillators and Multiple Voltage Levels
Publisher: IEEE
Year: 2014
Massive signal tracing using on-chip DRAM for in-system silicon debug
Publisher: IEEE
Year: 2014
Design automation for biochemistry synthesis on a digital microfluidic lab-on-a-chip
Publisher: IEEE
Year: 2014
Optimization of heaters in a digital microfluidic biochip for the polymerase chain reaction
Publisher: IEEE
Year: 2014
A distributed, reconfigurable, and reusable bist infrastructure for 3D-stacked ICs
Publisher: IEEE
Year: 2014
Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs
Publisher: IEEE
Year: 2014
Test-Delivery Optimization in Manycore SOCs
Publisher: IEEE
Year: 2014