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BTIarray: A Time-Overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability

Type: Journal Paper

Author : Awano, Hiromitsu; Hiromoto, Masayuki; Sato, Takao

Publisher: IEEE

Year: 2014

Distributed cooperative shared last-level caching in tiled multiprocessor system on chip

Type: Conference Paper

Publisher: IEEE

Year: 2014

Counter-vandalism at NDBC

Type: Conference Paper

Author : Beets, Raymond; Hill, Christopher; Coniglione, Robert; Portmann, Helmut

Publisher: IEEE

Year: 2014

Applying FFQ algorithm to implement the auxiliary regulation function of SMES in multi-area AGC system

Type: Conference Paper

Author : Li, Hongmei

Publisher: IEEE

Year: 2014

Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

Type: Journal Paper

Author : Camargo, Vinicius V. /A/.; Kaczer, Ben; Wirth, Glen; Grasser, Tibor; Groeseneken, Guido

Publisher: IEEE

Year: 2014

Methodology for Determination of Process Induced BTI Variability in MG/HK CMOS Technologies Using a Novel Matrix Test Structure

Type: Journal Paper

Author : Kerber, Andreas

Publisher: IEEE

Year: 2014

An automatic questionnaire survey model based on the collective message over the internet

Type: Conference Paper

Author : Jiang-Liang Hou , Yuh-Zong Chu

Publisher: IEEE

Year: 2014

Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates

Type: Journal Paper

Author : Kukner, Halil; Khan, Sharifullah; Weckx, Pieter; Raghavan, Praveen; Hamdioui, Said; Kaczer, Ben; Catthoor, Francky; Van der Perre, Liesbet; Lauwereins, Rudy; Groeseneken, Guido

Publisher: IEEE

Year: 2014

Design Framework to Overcome Aging Degradation of the 16 nm VLSI Technology Circuits

Type: Journal Paper

Author : Mounir Mahmoud, Mohamed; Soin, Norhayati; Fahmy, Hossam /A/. H.

Publisher: IEEE

Year: 2014

BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs

Type: Journal Paper

Author : Kai-Chiang Wu; Ing-Chao Lin; Yao-Te Wang; Shuen-Shiang Yang

Publisher: IEEE

Year: 2014

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BTIarray: A Time-Overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability

Distributed cooperative shared last-level caching in tiled multiprocessor system on chip

Counter-vandalism at NDBC

Applying FFQ algorithm to implement the auxiliary regulation function of SMES in multi-area AGC system

Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

Methodology for Determination of Process Induced BTI Variability in MG/HK CMOS Technologies Using a Novel Matrix Test Structure

An automatic questionnaire survey model based on the collective message over the internet

Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates

Design Framework to Overcome Aging Degradation of the 16 nm VLSI Technology Circuits

BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs

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BTIarray: A Time-Overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability

Distributed cooperative shared last-level caching in tiled multiprocessor system on chip

Counter-vandalism at NDBC

Applying FFQ algorithm to implement the auxiliary regulation function of SMES in multi-area AGC system

Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

Methodology for Determination of Process Induced BTI Variability in MG/HK CMOS Technologies Using a Novel Matrix Test Structure

An automatic questionnaire survey model based on the collective message over the internet

Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates

Design Framework to Overcome Aging Degradation of the 16 nm VLSI Technology Circuits

BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs