Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates
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سال
: 2014شناسه الکترونیک: 10.1109/TDMR.2013.2267274
کلیدواژه(گان): CMOS logic circuits,ageing,logic gates,negative bias temperature instability,CMOS logic gates,CPU time,TDDM,atomistic trap-based BTI models,bias temperature instability,deeply scaled CMOS technology,duty factor,gate drive strength,long-term aging,memory usage,reaction-diffusion,reliability,time-dependent degradation mechanisms,Atomistic trapping,Degradation,Reaction-diffusion models,Atomistic trap-based model,BTI,degradation,reaction-diffusion model,reliability
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Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates
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| contributor author | Kukner, Halil | |
| contributor author | Khan, Sharifullah | |
| contributor author | Weckx, Pieter | |
| contributor author | Raghavan, Praveen | |
| contributor author | Hamdioui, Said | |
| contributor author | Kaczer, Ben | |
| contributor author | Catthoor, Francky | |
| contributor author | Van der Perre, Liesbet | |
| contributor author | Lauwereins, Rudy | |
| contributor author | Groeseneken, Guido | |
| date accessioned | 2020-03-12T18:24:07Z | |
| date available | 2020-03-12T18:24:07Z | |
| date issued | 2014 | |
| identifier issn | 1530-4388 | |
| identifier other | 6529142.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/957250 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7989459 | |
| subject keywords | CMOS logic circuits | |
| subject keywords | ageing | |
| subject keywords | logic gates | |
| subject keywords | negative bias temperature instability | |
| subject keywords | CMOS logic gates | |
| subject keywords | CPU time | |
| subject keywords | TDDM | |
| subject keywords | atomistic trap-based BTI models | |
| subject keywords | bias temperature instability | |
| subject keywords | deeply scaled CMOS technology | |
| subject keywords | duty factor | |
| subject keywords | gate drive strength | |
| subject keywords | long-term aging | |
| subject keywords | memory usage | |
| subject keywords | reaction-diffusion | |
| subject keywords | reliability | |
| subject keywords | time-dependent degradation mechanisms | |
| subject keywords | Atomistic trapping | |
| subject keywords | Degradation | |
| subject keywords | Reaction-diffusion models | |
| subject keywords | Atomistic trap-based model | |
| subject keywords | BTI | |
| subject keywords | degradation | |
| subject keywords | reaction-diffusion model | |
| subject keywords | reliability | |
| identifier doi | 10.1109/TDMR.2013.2267274 | |
| journal title | Device and Materials Reliability, IEEE Transactions on | |
| journal volume | 14 | |
| journal issue | 1 | |
| filesize | 1064851 | |
| citations | 0 |