Improving CMOS open defect coverage using hazard activated tests
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Year
: 2014DOI: 10.1109/AUPEC.2014.6966600
Keyword(s): Clocks,Current transformers,Educational institutions,Modulation,Resonant frequency,Transformer cores,Windings
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Improving CMOS open defect coverage using hazard activated tests
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| contributor author | Chao Han , Singh, A.D. | |
| date accessioned | 2020-03-12T19:46:35Z | |
| date available | 2020-03-12T19:46:35Z | |
| date issued | 2014 | |
| identifier other | 6818740.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/989675?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Improving CMOS open defect coverage using hazard activated tests | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8105934 | |
| subject keywords | Clocks | |
| subject keywords | Current transformers | |
| subject keywords | Educational institutions | |
| subject keywords | Modulation | |
| subject keywords | Resonant frequency | |
| subject keywords | Transformer cores | |
| subject keywords | Windings | |
| identifier doi | 10.1109/AUPEC.2014.6966600 | |
| journal title | LSI Test Symposium (VTS), 2014 IEEE 32nd | |
| filesize | 264741 | |
| citations | 0 |