A Fine-Grained Clock Buffer Polarity Assignment for High-Speed and Low-Power Digital Systems
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: 2014شناسه الکترونیک: 10.1109/TCAD.2013.2288698
کلیدواژه(گان): buffer circuits,clocks,current fluctuations,high-speed integrated circuits,integrated circuit design,integrated circuit noise,integrated circuit reliability,low-power electronics,benchmark circuits,circuit reliability,circuit speed,clock signal propagation,clock skew violation,current fluctuation,fine-grained clock buffer polarity assignment,high-speed digital systems,leaf clock buffering elements,low-power digital systems,nonleaf clock buffering elements,power-ground noise,s
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A Fine-Grained Clock Buffer Polarity Assignment for High-Speed and Low-Power Digital Systems
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| contributor author | Deokjin Joo | |
| contributor author | Taewhan Kim | |
| date accessioned | 2020-03-12T18:46:28Z | |
| date available | 2020-03-12T18:46:28Z | |
| date issued | 2014 | |
| identifier issn | 0278-0070 | |
| identifier other | 6740023.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/969719?locale-attribute=fa | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Fine-Grained Clock Buffer Polarity Assignment for High-Speed and Low-Power Digital Systems | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8004058 | |
| subject keywords | buffer circuits | |
| subject keywords | clocks | |
| subject keywords | current fluctuations | |
| subject keywords | high-speed integrated circuits | |
| subject keywords | integrated circuit design | |
| subject keywords | integrated circuit noise | |
| subject keywords | integrated circuit reliability | |
| subject keywords | low-power electronics | |
| subject keywords | benchmark circuits | |
| subject keywords | circuit reliability | |
| subject keywords | circuit speed | |
| subject keywords | clock signal propagation | |
| subject keywords | clock skew violation | |
| subject keywords | current fluctuation | |
| subject keywords | fine-grained clock buffer polarity assignment | |
| subject keywords | high-speed digital systems | |
| subject keywords | leaf clock buffering elements | |
| subject keywords | low-power digital systems | |
| subject keywords | nonleaf clock buffering elements | |
| subject keywords | power-ground noise | |
| subject keywords | s | |
| identifier doi | 10.1109/TCAD.2013.2288698 | |
| journal title | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on | |
| journal volume | 33 | |
| journal issue | 3 | |
| filesize | 1074294 | |
| citations | 0 |