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A Linear Time-Over-Threshold Digitizing Scheme and Its 64-channel DAQ Prototype Design on FPGA for a Continuous Crystal PET Detector

contributor authorWang Yonggang
contributor authorCheng Xinyi
contributor authorLi Deng
contributor authorZhu Wensong
contributor authorLiu Chong
date accessioned2020-03-12T18:40:20Z
date available2020-03-12T18:40:20Z
date issued2014
identifier issn0018-9499
identifier other6710205.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/966342?locale-attribute=fa&show=full
formatgeneral
languageEnglish
publisherIEEE
titleA Linear Time-Over-Threshold Digitizing Scheme and Its 64-channel DAQ Prototype Design on FPGA for a Continuous Crystal PET Detector
typeJournal Paper
contenttypeMetadata Only
identifier padid8000138
subject keywordsdata acquisition
subject keywordsfield programmable gate arrays
subject keywordspositron emission tomography
subject keywordsprototypes
subject keywordsthreshold elements
subject keywordsDAQ prototype design
subject keywordsFPGA
subject keywordsTOT time width
subject keywordscontinuous crystal PET detector
subject keywordsdata acquisition system
subject keywordsfield programmable gate array
subject keywordslinear time over threshold digitizing scheme
subject keywordsnuclear pulse amplitude digitization
subject keywordsparticle detector
subject keywordspulse height digitizing
subject keywordspulse shaping
subject keywordsshared dynamic threshold generating circuit
subject keywordsClocks
subject keywordsCrystals
subject keywordsDetectors
subject keywordsDynamic range
subject keywordsField programmable gate
identifier doi10.1109/TNS.2013.2293758
journal titleNuclear Science, IEEE Transactions on
journal volume61
journal issue1
filesize864997
citations0


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