Show simple item record

A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS

contributor authorWhatmough, Paul
contributor authorDas, S.
contributor authorBull, David
date accessioned2020-03-12T18:30:16Z
date available2020-03-12T18:30:16Z
date issued2014
identifier issn0018-9200
identifier other6636082.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/960716?locale-attribute=fa&show=full
formatgeneral
languageEnglish
publisherIEEE
titleA Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS
typeJournal Paper
contenttypeMetadata Only
identifier padid7993411
subject keywordsCMOS integrated circuits
subject keywordsdigital signal processing chips
subject keywordserror correction
subject keywordsreal-time systems
subject keywordsCMOS
subject keywordsapproximate error correction
subject keywordscritical paths
subject keywordsfixed-latency error-correction
subject keywordsfrequency 1 GHz
subject keywordslow-power razor FIR accelerator
subject keywordsrazor latches
subject keywordsreal-time DSP systems
subject keywordssize 65 nm
subject keywordstime-borrow tracking pipeline
subject keywordstiming-error detection
subject keywordsClocks
subject keywordsDigital signal processing
subject keywordsError correction
subject keywordsImage edge detection
subject keywordsLatches
subject keywordsPipelines
subject keywordsTiming
subject keywordsAdaptive circuits
subject keywordsdigital signal processing (DSP)
subject keywordsdynamic vo
identifier doi10.1109/JSSC.2013.2284364
journal titleSolid-State Circuits, IEEE Journal of
journal volume49
journal issue1
filesize1694626
citations0


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record