A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS
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: 2014DOI: 10.1109/JSSC.2013.2284364
Keyword(s): CMOS integrated circuits,digital signal processing chips,error correction,real-time systems,CMOS,approximate error correction,critical paths,fixed-latency error-correction,frequency 1 GHz,low-power razor FIR accelerator,razor latches,real-time DSP systems,size 65 nm,time-borrow tracking pipeline,timing-error detection,Clocks,Digital signal processing,Error correction,Image edge detection,Latches,Pipelines,Timing,Adaptive circuits,digital signal processing (DSP),dynamic vo
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A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS
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| contributor author | Whatmough, Paul | |
| contributor author | Das, S. | |
| contributor author | Bull, David | |
| date accessioned | 2020-03-12T18:30:16Z | |
| date available | 2020-03-12T18:30:16Z | |
| date issued | 2014 | |
| identifier issn | 0018-9200 | |
| identifier other | 6636082.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/960716 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7993411 | |
| subject keywords | CMOS integrated circuits | |
| subject keywords | digital signal processing chips | |
| subject keywords | error correction | |
| subject keywords | real-time systems | |
| subject keywords | CMOS | |
| subject keywords | approximate error correction | |
| subject keywords | critical paths | |
| subject keywords | fixed-latency error-correction | |
| subject keywords | frequency 1 GHz | |
| subject keywords | low-power razor FIR accelerator | |
| subject keywords | razor latches | |
| subject keywords | real-time DSP systems | |
| subject keywords | size 65 nm | |
| subject keywords | time-borrow tracking pipeline | |
| subject keywords | timing-error detection | |
| subject keywords | Clocks | |
| subject keywords | Digital signal processing | |
| subject keywords | Error correction | |
| subject keywords | Image edge detection | |
| subject keywords | Latches | |
| subject keywords | Pipelines | |
| subject keywords | Timing | |
| subject keywords | Adaptive circuits | |
| subject keywords | digital signal processing (DSP) | |
| subject keywords | dynamic vo | |
| identifier doi | 10.1109/JSSC.2013.2284364 | |
| journal title | Solid-State Circuits, IEEE Journal of | |
| journal volume | 49 | |
| journal issue | 1 | |
| filesize | 1694626 | |
| citations | 0 |