Implementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs
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: 2014DOI: 10.1109/TPDS.2013.52
Keyword(s): block codes,codecs,convolutional codes,data structures,decoding,graphics processing units,parity check codes,GPU,LDPC block-code decoders/simulators,LDPC convolutional code decoder,LDPCCC decoder,Tanner graph,data structures,decoding process,graphics processing units,quasi-cyclic LDPC block code,quasicyclic structure,read and write processes,Block codes,Convolutional codes,Decoding,Graphics processing units,Iterative decoding,Message systems,CUDA,LDPC,LDPC convolutional
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Implementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs
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| contributor author | Yue Zhao | |
| contributor author | Lau, Francis C. M. | |
| date accessioned | 2020-03-12T18:21:50Z | |
| date available | 2020-03-12T18:21:50Z | |
| date issued | 2014 | |
| identifier issn | 1045-9219 | |
| identifier other | 6470607.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/955966?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Implementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7987818 | |
| subject keywords | block codes | |
| subject keywords | codecs | |
| subject keywords | convolutional codes | |
| subject keywords | data structures | |
| subject keywords | decoding | |
| subject keywords | graphics processing units | |
| subject keywords | parity check codes | |
| subject keywords | GPU | |
| subject keywords | LDPC block-code decoders/simulators | |
| subject keywords | LDPC convolutional code decoder | |
| subject keywords | LDPCCC decoder | |
| subject keywords | Tanner graph | |
| subject keywords | data structures | |
| subject keywords | decoding process | |
| subject keywords | graphics processing units | |
| subject keywords | quasi-cyclic LDPC block code | |
| subject keywords | quasicyclic structure | |
| subject keywords | read and write processes | |
| subject keywords | Block codes | |
| subject keywords | Convolutional codes | |
| subject keywords | Decoding | |
| subject keywords | Graphics processing units | |
| subject keywords | Iterative decoding | |
| subject keywords | Message systems | |
| subject keywords | CUDA | |
| subject keywords | LDPC | |
| subject keywords | LDPC convolutional | |
| identifier doi | 10.1109/TPDS.2013.52 | |
| journal title | Parallel and Distributed Systems, IEEE Transactions on | |
| journal volume | 25 | |
| journal issue | 3 | |
| filesize | 904211 | |
| citations | 0 |