Improved Thermal Performance of SOI Using a Compound Buried Layer
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Year
: 2014DOI: 10.1109/TED.2014.2318832
Keyword(s): buried layers,power bipolar transistors,silicon compounds,silicon-on-insulator,thermal conductivity,thermal resistance,SOI,Si,SiO<,sub>,2<,/sub>,compound buried layer,dielectric layer,equivalent oxide thickness,lateral heat flow,polycrystalline silicon,power bipolar transistors,size 13.5 mum,thermal conductivity,thermal performance,thermal resistance,undoped polysilicon,Conductivity,Silicon,Substrates,Thermal conductivity,Thermal resistance,Transistors,Compound
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Improved Thermal Performance of SOI Using a Compound Buried Layer
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| contributor author | Baine, P. | |
| contributor author | Montgomery, John H. | |
| contributor author | Armstrong, B. Mervyn | |
| contributor author | Gamble, Harold S. | |
| contributor author | Harrington, Sarah J. | |
| contributor author | Nigrin, Sydney | |
| contributor author | Wilson, Richard | |
| contributor author | Oo, Kean B. | |
| contributor author | Armstrong, Alastair G. | |
| contributor author | Suder, Suli | |
| date accessioned | 2020-03-13T00:01:51Z | |
| date available | 2020-03-13T00:01:51Z | |
| date issued | 2014 | |
| identifier issn | 0018-9383 | |
| identifier other | 6809995.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1131905?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Improved Thermal Performance of SOI Using a Compound Buried Layer | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8312801 | |
| subject keywords | buried layers | |
| subject keywords | power bipolar transistors | |
| subject keywords | silicon compounds | |
| subject keywords | silicon-on-insulator | |
| subject keywords | thermal conductivity | |
| subject keywords | thermal resistance | |
| subject keywords | SOI | |
| subject keywords | Si | |
| subject keywords | SiO< | |
| subject keywords | sub> | |
| subject keywords | 2< | |
| subject keywords | /sub> | |
| subject keywords | compound buried layer | |
| subject keywords | dielectric layer | |
| subject keywords | equivalent oxide thickness | |
| subject keywords | lateral heat flow | |
| subject keywords | polycrystalline silicon | |
| subject keywords | power bipolar transistors | |
| subject keywords | size 13.5 mum | |
| subject keywords | thermal conductivity | |
| subject keywords | thermal performance | |
| subject keywords | thermal resistance | |
| subject keywords | undoped polysilicon | |
| subject keywords | Conductivity | |
| subject keywords | Silicon | |
| subject keywords | Substrates | |
| subject keywords | Thermal conductivity | |
| subject keywords | Thermal resistance | |
| subject keywords | Transistors | |
| subject keywords | Compound | |
| identifier doi | 10.1109/TED.2014.2318832 | |
| journal title | Electron Devices, IEEE Transactions on | |
| journal volume | 61 | |
| journal issue | 6 | |
| filesize | 1569022 | |
| citations | 0 |