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Design of a 32nm independent gate FinFET based SRAM cell with improved noise margin for low power application

contributor authorRahaman, M. , Mahapatra, R.
date accessioned2020-03-12T23:27:19Z
date available2020-03-12T23:27:19Z
date issued2014
identifier other6892721.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1112247?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleDesign of a 32nm independent gate FinFET based SRAM cell with improved noise margin for low power application
typeConference Paper
contenttypeMetadata Only
identifier padid8281152
subject keywordsAcoustics
subject keywordsConferences
subject keywordsDatabases
subject keywordsEstimation
subject keywordsNoise
subject keywordsSpeech
subject keywordsTraining
subject keywordsC50
subject keywordsCART
subject keywordsDBN
subject keywordsLinear regression
identifier doi10.1109/IWAENC.2014.6954306
journal titlelectronics and Communication Systems (ICECS), 2014 International Conference on
filesize1298421
citations1


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