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A compact hardware implementation of SM3

contributor authorAo Tianyong
contributor authorHe Zhangqing
contributor authorDai Kui
contributor authorZou Xuecheng
date accessioned2020-03-12T22:55:06Z
date available2020-03-12T22:55:06Z
date issued2014
identifier other7029849.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1099104?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleA compact hardware implementation of SM3
typeConference Paper
contenttypeMetadata Only
identifier padid8240610
subject keywordsembedded systems
subject keywordsn optimising compilers
subject keywordsn power aware computing
subject keywordsn power consumption
subject keywordsn random-access storage
subject keywordsn reliability
subject keywordsn FRAM based registers
subject keywordsn NAIS algorithm
subject keywordsn NV register aware instruction selection
subject keywordsn NVM
subject keywordsn code generation
subject keywordsn compiler optimization techniques
subject keywordsn embedded processors
subject keywordsn embedded systems
subject keywordsn energy consumption
subject keywordsn limited power supply
subject keywordsn memory access instructions
subject keywordsn nonvolatile memory
subject keywordsn nonvolatile registers aware instruction select
identifier doi10.1109/RTCSA.2014.6910508
journal titleonsumer Electronics - China, 2014 IEEE International Conference on
filesize100937
citations0


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