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Analysis of pre-patterns in the specification of the interaction design for Digital TV

Author:
Mendes, M.S.
,
Furtado, E.
Publisher:
IEEE
Year
: 2014
DOI: 10.1109/IITC.2014.6831870
URI: https://libsearch.um.ac.ir:443/fum/handle/fum/1064940
Keyword(s): CMOS integrated circuits,n integrated circuit interconnections,n three-dimensional integrated circuits,n PMD oxide,n contact protection layer,n keep out zone process development,n middle of line layer stack,n planar CMOS technology,n size 20 nm,n via middle TSV,n Annealing,n Copper,n Silicon,n Tensile stress,n Threshold voltage,n Through-silicon vias
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    Analysis of pre-patterns in the specification of the interaction design for Digital TV

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contributor authorMendes, M.S.
contributor authorFurtado, E.
date accessioned2020-03-12T21:54:53Z
date available2020-03-12T21:54:53Z
date issued2014
identifier other6965149.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1064940?locale-attribute=en
formatgeneral
languageEnglish
publisherIEEE
titleAnalysis of pre-patterns in the specification of the interaction design for Digital TV
typeConference Paper
contenttypeMetadata Only
identifier padid8198140
subject keywordsCMOS integrated circuits
subject keywordsn integrated circuit interconnections
subject keywordsn three-dimensional integrated circuits
subject keywordsn PMD oxide
subject keywordsn contact protection layer
subject keywordsn keep out zone process development
subject keywordsn middle of line layer stack
subject keywordsn planar CMOS technology
subject keywordsn size 20 nm
subject keywordsn via middle TSV
subject keywordsn Annealing
subject keywordsn Copper
subject keywordsn Silicon
subject keywordsn Tensile stress
subject keywordsn Threshold voltage
subject keywordsn Through-silicon vias
identifier doi10.1109/IITC.2014.6831870
journal titleomputing Conference (CLEI), 2014 XL Latin American
filesize3391418
citations0
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