Show simple item record

Low-power design methodology for CML and ECL circuits

contributor authorSchrape, Oliver
contributor authorAppel, Markus
contributor authorWinkler, Frank
contributor authorKrstic, Milos
date accessioned2020-03-12T21:38:28Z
date available2020-03-12T21:38:28Z
date issued2014
identifier other6951898.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1055405?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleLow-power design methodology for CML and ECL circuits
typeConference Paper
contenttypeMetadata Only
identifier padid8186282
subject keywordsprogram compilers
subject keywordsn software performance evaluation
subject keywordsn Fermi NVIDIA architecture
subject keywordsn Kepler NVIDIA architecture
subject keywordsn OpenACC annotated code
subject keywordsn OpenACC compilers
subject keywordsn hardware accelerator
subject keywordsn heterogeneous HPC
subject keywordsn performance evaluation
subject keywordsn Bandwidth
subject keywordsn Benchmark testing
subject keywordsn Graphics processing units
subject keywordsn Kernel
subject keywordsn Runtime
subject keywordsn Standards
subject keywordsn Accelerators
subject keywordsn CUDA
subject keywordsn Compilers
subject keywordsn GPGPU
subject keywordsn HMPP
subject keywordsn OpenACC
subject keywordsn PGI
subject keywordsn accULL
subject keywordsn benchmark
identifier doi10.1109/PDP.2014.29
journal titleower and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on
filesize701483
citations1


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record