Implementation of real time moving object detection using background subtraction in FPGA
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: 2014DOI: 10.1109/ISQED.2014.6783393
Keyword(s): application specific integrated circuits,n fast Fourier transforms,n hardware description languages,n software architecture,n software tools,n LISA 2.0,n application specific instruction-set processor architecture exploration,n design implementation,n design time reduction,n energy-efficiency,n fixed shuffling mode,n flexible FFT ASIP,n hardware complexity reduction,n human effort reduction,n machine description language,n parallel FFT algorithm
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Implementation of real time moving object detection using background subtraction in FPGA
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| contributor author | Cherian, S. | |
| contributor author | Singh, C.S. | |
| contributor author | Manikandan, M. | |
| date accessioned | 2020-03-12T21:37:06Z | |
| date available | 2020-03-12T21:37:06Z | |
| date issued | 2014 | |
| identifier other | 6949967.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1054700?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Implementation of real time moving object detection using background subtraction in FPGA | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8185367 | |
| subject keywords | application specific integrated circuits | |
| subject keywords | n fast Fourier transforms | |
| subject keywords | n hardware description languages | |
| subject keywords | n software architecture | |
| subject keywords | n software tools | |
| subject keywords | n LISA 2.0 | |
| subject keywords | n application specific instruction-set processor architecture exploration | |
| subject keywords | n design implementation | |
| subject keywords | n design time reduction | |
| subject keywords | n energy-efficiency | |
| subject keywords | n fixed shuffling mode | |
| subject keywords | n flexible FFT ASIP | |
| subject keywords | n hardware complexity reduction | |
| subject keywords | n human effort reduction | |
| subject keywords | n machine description language | |
| subject keywords | n parallel FFT algorithm | |
| identifier doi | 10.1109/ISQED.2014.6783393 | |
| journal title | ommunications and Signal Processing (ICCSP), 2014 International Conference on | |
| filesize | 587168 | |
| citations | 0 |