Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs
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: 2014DOI: 10.1109/CITSM.2014.7042179
Keyword(s): Algorithm design and analysis,Cities and towns,Mobile communication,Navigation,Routing,Vehicles
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Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs
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| contributor author | Sanchez, E. | |
| contributor author | Sterpone, L. | |
| contributor author | Ullah, A. | |
| date accessioned | 2020-03-12T21:09:41Z | |
| date available | 2020-03-12T21:09:41Z | |
| date issued | 2014 | |
| identifier other | 6927478.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1039103?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8165876 | |
| subject keywords | Algorithm design and analysis | |
| subject keywords | Cities and towns | |
| subject keywords | Mobile communication | |
| subject keywords | Navigation | |
| subject keywords | Routing | |
| subject keywords | Vehicles | |
| identifier doi | 10.1109/CITSM.2014.7042179 | |
| journal title | ield Programmable Logic and Applications (FPL), 2014 24th International Conference on | |
| filesize | 255540 | |
| citations | 0 |