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[IEEE 2008 IEEE International SOC Conference (SOCC) - Newport Beach, CA, USA (2008.09.17-2008.09.20)] 2008 IEEE International SOC Conference - A low power 32 nanometer CMOS digitally controlled oscillator

نوع: Journal Paper

نویسنده : Jun Zhao,; Yong-bin Kim,

سال: 2008

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A 10-Gb/s receiver with a continuous-time linear equalizer and 1-tap decision-feedback equalizer

نوع: Journal Paper

نویسنده : Yongsuk Choi; Yong-Bin Kim

سال: 2015

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Circuit implementation of FitzHugh-Nagumo neuron model using Field Programmable Analog Arrays

نوع: Journal Paper

نویسنده : Jun Zhao; Yong-Bin Kim

سال: 2007

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Fault Tolerant Source Routing for Network-on-chip

نوع: Conference Paper

نویسنده : Young Bok Kim; Yong-Bin Kim

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A 12-bit 32MS/s SAR ADC using built-in self calibration technique to minimize capacitor mismatch

نوع: Conference Paper

نویسنده : In-Seok Jung; Yong-Bin Kim

ناشر: IEEE

سال: 2014

A high speed low power modulo 2ⁿ+1 multiplier design using carbon-nanotube technology

نوع: Journal Paper

نویسنده : He Qi; Yong-Bin Kim; Minsu Choi

سال: 2012

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A switched-capacitor DC-DC converter using delta-sigma digital pulse frequency modulation control method

نوع: Journal Paper

نویسنده : Yongsuk Choi; Heungjun Jeon; Yong-Bin Kim

سال: 2013

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Noise Reduction Technique Through Bandwidth Switching for Switched-Capacitor Amplifier

نوع: Journal Paper

نویسنده : Haiyang Zhu; Ron Kapusta; Yong-Bin Kim

سال: 2015

A 100MS/s 10-bit Split-SAR ADC with Capacitor Mismatch Compensation Using Built-In Calibration

نوع: Journal Paper

نویسنده : Yongsuk Choi; Yong-Bin Kim; In-Seok Jung

سال: 2016

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A 10-bit 64MS/s SAR ADC using variable clock period method

نوع: Conference Paper

نویسنده : In-Seok Jung; Marvin Onabajo; Yong-Bin Kim

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[IEEE 2008 IEEE International SOC Conference (SOCC) - Newport Beach, CA, USA (2008.09.17-2008.09.20)] 2008 IEEE International SOC Conference - A low power 32 nanometer CMOS digitally controlled oscillator

A 10-Gb/s receiver with a continuous-time linear equalizer and 1-tap decision-feedback equalizer

Circuit implementation of FitzHugh-Nagumo neuron model using Field Programmable Analog Arrays

Fault Tolerant Source Routing for Network-on-chip

A 12-bit 32MS/s SAR ADC using built-in self calibration technique to minimize capacitor mismatch

A high speed low power modulo 2ⁿ+1 multiplier design using carbon-nanotube technology

A switched-capacitor DC-DC converter using delta-sigma digital pulse frequency modulation control method

Noise Reduction Technique Through Bandwidth Switching for Switched-Capacitor Amplifier

A 100MS/s 10-bit Split-SAR ADC with Capacitor Mismatch Compensation Using Built-In Calibration

A 10-bit 64MS/s SAR ADC using variable clock period method

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[IEEE 2008 IEEE International SOC Conference (SOCC) - Newport Beach, CA, USA (2008.09.17-2008.09.20)] 2008 IEEE International SOC Conference - A low power 32 nanometer CMOS digitally controlled oscillator

A 10-Gb/s receiver with a continuous-time linear equalizer and 1-tap decision-feedback equalizer

Circuit implementation of FitzHugh-Nagumo neuron model using Field Programmable Analog Arrays

Fault Tolerant Source Routing for Network-on-chip

A 12-bit 32MS/s SAR ADC using built-in self calibration technique to minimize capacitor mismatch

A high speed low power modulo 2n+1 multiplier design using carbon-nanotube technology

A switched-capacitor DC-DC converter using delta-sigma digital pulse frequency modulation control method

Noise Reduction Technique Through Bandwidth Switching for Switched-Capacitor Amplifier

A 100MS/s 10-bit Split-SAR ADC with Capacitor Mismatch Compensation Using Built-In Calibration

A 10-bit 64MS/s SAR ADC using variable clock period method

A high speed low power modulo 2ⁿ+1 multiplier design using carbon-nanotube technology