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نمایش تعداد 1-10 از 18

Achieving Out-of-Order Performance with Almost In-Order Complexity

نوع: Conference Paper

نویسنده : Francis Tseng; Yale N. Patt

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Fairness via source throttling

نوع: Journal Paper

نویسنده : Eiman Ebrahimi; Chang Joo Lee; Onur Mutlu; Yale N. Patt

سال: 2010

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Fairness via source throttling

نوع: Conference Paper

نویسنده : Eiman Ebrahimi; Chang Joo Lee; Onur Mutlu; Yale N. Patt

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Fairness via source throttling

نوع: Journal Paper

نویسنده : Eiman Ebrahimi; Chang Joo Lee; Onur Mutlu; Yale N. Patt

سال: 2010

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Improving trace cache effectiveness with branch promotion and trace packing

نوع: Journal Paper

نویسنده : Sanjay Jeram Patel; Marius Evers; Yale N. Patt

سال: 1998

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Feedback-driven threading

نوع: Journal Paper

نویسنده : M. Aater Suleman; Moinuddin K. Qureshi; Yale N. Patt

سال: 2008

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Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

نوع: Journal Paper

نویسنده : Tse-Yu Yeh; Deborah T. Marr; Yale N. Patt

سال: 2014

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Feedback-driven threading

نوع: Journal Paper

نویسنده : M. Aater Suleman; Moinuddin K. Qureshi; Yale N. Patt

سال: 2008

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High Performance Embedded Architectures and Compilers: 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings ... Computer Science and General Issues)

نوع: Ebook

نویسنده : Yale N. Patt; Pierfrancesco Foglia; Evelyn Duesterwald; Paolo Faraboschi; Xavier Martorell

ناشر: Springer

سال: 2010

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Accelerating critical section execution with asymmetric multi-core architectures

نوع: Journal Paper

نویسنده : M. Aater Suleman; Onur Mutlu; Moinuddin K. Qureshi; Yale N. Patt

سال: 2009

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Achieving Out-of-Order Performance with Almost In-Order Complexity

Fairness via source throttling

Fairness via source throttling

Fairness via source throttling

Improving trace cache effectiveness with branch promotion and trace packing

Feedback-driven threading

Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Feedback-driven threading

High Performance Embedded Architectures and Compilers: 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings ... Computer Science and General Issues)

Accelerating critical section execution with asymmetric multi-core architectures

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Achieving Out-of-Order Performance with Almost In-Order Complexity

Fairness via source throttling

Fairness via source throttling

Fairness via source throttling

Improving trace cache effectiveness with branch promotion and trace packing

Feedback-driven threading

Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Feedback-driven threading

High Performance Embedded Architectures and Compilers: 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings ... Computer Science and General Issues)

Accelerating critical section execution with asymmetric multi-core architectures