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RISClosed-form CRLBs for SNR estimation from turbo-coded square-QAM-modulated signals
A nonlinear signal specific ADC for efficient neural recording
the outgoing bit rate carrying the recorded neural data.
Another major benefit of digitizing neural signals using a proper nonlinear analog-to-digital converter (ADC) is the improvement in the signal-to-noise ratio (SNR) of the signal. The 8-b nonlinear...
Analysis of the linearity of pipelined ADC due to capacitor non-linearity
In this paper, the effect of capacitor non-linearity
on the linearity of a pipelined ADC is analyzed. First, the effect
of capacitor non-linearity on the characteristics of a 1.5-bit
residue stage is ...
A Charge-Redistribution Phase-Domain ADC Using an IQ-Assisted Binary-Search Algorithm
Phase-domain Analog-to-Digital Converters (Ph-ADCs) have been considered for power-efficient implementation of body-area network transceivers employing phase demodulation. Conventional implementations of the Ph-ADCs, which work based on a full...
An ultra-low-power 10-Bit 100-kS/s successive-approximation analog-to-digital converter
Successive-approximation analog-to-digital converters (SA-ADCs) have recently been widely used for
moderate-speed moderate-resolution applications where power consumption is of major concern. In this paper, several techniques are proposed...
A Low-Power Time-Based Phase-Domain Analog-to- Digital Converter
This paper presents a low-power time-based phase domain analog-to-digital converter (Ph-ADC). The proposed circuit employs not only the binary-search IQ-assisted algorithm, but also time-domain signal processing to extract the output digital codes...
Digital Background Calibration of Capacitor Mismatch Errors in Pipelined ADCs
A digital background calibration technique is proposed to correct for the linearity error due to capacitor mismatches in pipelined analog-to-digital converters (ADCs). During the normal ADC operation, it randomly swaps the feedback capacitor...