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A Scalable and Modular Architecture for High-Performance Packet Classification

Type: Journal Paper

Author : Ganegedara, Thilan; Weirong Jiang; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors

Type: Conference Paper

Author : Qu, Yun R.; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

400 Gbps energy-efficient multi-field packet classification on FPGA

Type: Conference Paper

Author : Zhou, Shijie; Zhao, Sihan; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

[Lecture Notes in Computer Science] High Performance Computing - HiPC 2008 Volume 5374 || An Energy-Balanced Task Scheduling Heuristic for Heterogeneous Wireless Sensor Networks

Type: Journal Paper

Author : Sadayappan, Ponnuswamy; Parashar, Manish; Badrinath, Ramamurthy; Prasanna, Viktor K.

Year: 2008

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[Lecture Notes in Computer Science] High Performance Computing â HiPC 2007 Volume 4873 || Accelerating Large Graph Algorithms on the GPU Using CUDA

Type: Journal Paper

Author : Aluru, Srinivas; Parashar, Manish; Badrinath, Ramamurthy; Prasanna, Viktor K.

Year: 2007

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High-Performance Traffic Classification on GPU

Type: Conference Paper

Author : Zhou, Shijie; Nittoor, Prashant Rao; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors

Type: Conference Paper

Author : Chu, Hsuan-Yi; Xia, Yinglong; Panangadan, Anand; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

High-throughput hash-based online traffic classification engines on FPGA

Type: Conference Paper

Author : Gandhi, Vaibhav R.; Qu, Yun R.; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

Energy-efficient histogram on FPGA

Type: Conference Paper

Author : Sanny, Andrea; Yang, Yi-Hua E.; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

Extracting discriminative shapelets from heterogeneous sensor data

Type: Conference Paper

Author : Patri, Om P.; Sharma, Abhishek B.; Chen, Haifeng; Jiang, Guofei; Panangadan, Anand V.; Prasanna, Viktor K.

Publisher: IEEE

Year: 2014

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A Scalable and Modular Architecture for High-Performance Packet Classification

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors

400 Gbps energy-efficient multi-field packet classification on FPGA

[Lecture Notes in Computer Science] High Performance Computing - HiPC 2008 Volume 5374 || An Energy-Balanced Task Scheduling Heuristic for Heterogeneous Wireless Sensor Networks

[Lecture Notes in Computer Science] High Performance Computing â HiPC 2007 Volume 4873 || Accelerating Large Graph Algorithms on the GPU Using CUDA

High-Performance Traffic Classification on GPU

Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors

High-throughput hash-based online traffic classification engines on FPGA

Energy-efficient histogram on FPGA

Extracting discriminative shapelets from heterogeneous sensor data

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A Scalable and Modular Architecture for High-Performance Packet Classification

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors

400 Gbps energy-efficient multi-field packet classification on FPGA

[Lecture Notes in Computer Science] High Performance Computing - HiPC 2008 Volume 5374 || An Energy-Balanced Task Scheduling Heuristic for Heterogeneous Wireless Sensor Networks

[Lecture Notes in Computer Science] High Performance Computing â HiPC 2007 Volume 4873 || Accelerating Large Graph Algorithms on the GPU Using CUDA

High-Performance Traffic Classification on GPU

Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors

High-throughput hash-based online traffic classification engines on FPGA

Energy-efficient histogram on FPGA

Extracting discriminative shapelets from heterogeneous sensor data