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Now showing items 1-8 of 8

Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier

Type: Journal Paper

Author : Ramakrishnan, Shankar; Hasler, J.

Publisher: IEEE

Year: 2014

High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Type: Journal Paper

Author : Schlottmann, Craig R.; Hasler, J.

Publisher: IEEE

Year: 2014

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA

Type: Journal Paper

Author : Brink, Stephen; Hasler, J.; Wunderlich, Ralf

Publisher: IEEE

Year: 2014

Implementation of a new STATCOM model for digital real time simulations with large time step

Type: Conference Paper

Author : Fusero, M.; Hasler, J.-P.; Kheir, J.

Publisher: IEEE

Year: 2014

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC

Type: Journal Paper

Author : Koziol, Scott; Brink, Stephen; Hasler, J.

Publisher: IEEE

Year: 2014

[IEEE Electric Drives Joint Symposium (ELECTROMOTION) - Lillie, France (2009.07.1-2009.07.3)] 2009 8th International Symposium on Advanced Electromechanical Motion Systems & Electric Drives Joint Symposium - STATCOM to enhance power quality and security of rail traction supply

Type: Journal Paper

Author : Grunbaum, R.; Hasler, J.-Ph.; Larsson, T.; Meslay, M.

Year: 2009

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Speech Processing on a Reconfigurable Analog Platform

Type: Journal Paper

Author : Ramakrishnan, Shankar; Basu, Anirban; Leung Kin Chiu; Hasler, J.; Anderson, Dave; Brink, Stephen

Publisher: IEEE

Year: 2014

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

Type: Journal Paper

Author : Gurun, G.; Tekes, Coskun; Zahorian, Jaime; Xu, Tao; Satir, S.; Karaman, Mustafa; Hasler, J.; Degertekin, F. Levent

Publisher: IEEE

Year: 2014

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Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier

High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA

Implementation of a new STATCOM model for digital real time simulations with large time step

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC

[IEEE Electric Drives Joint Symposium (ELECTROMOTION) - Lillie, France (2009.07.1-2009.07.3)] 2009 8th International Symposium on Advanced Electromechanical Motion Systems & Electric Drives Joint Symposium - STATCOM to enhance power quality and security of rail traction supply

Speech Processing on a Reconfigurable Analog Platform

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

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Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier

High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA

Implementation of a new STATCOM model for digital real time simulations with large time step

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC

[IEEE Electric Drives Joint Symposium (ELECTROMOTION) - Lillie, France (2009.07.1-2009.07.3)] 2009 8th International Symposium on Advanced Electromechanical Motion Systems & Electric Drives Joint Symposium - STATCOM to enhance power quality and security of rail traction supply

Speech Processing on a Reconfigurable Analog Platform

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging