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CMOS V<inf>T</inf> characterization by capacitance measurements in FDSOI PIN gated diodes

Type: Conference Paper

Author : Navarro, C.; Bawedin, M.; Andrieu, F.; Cluzel, J.; Garros, X.; Cristoloveanu, S.

Publisher: IEEE

Year: 2014

Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes

Type: Conference Paper

Author : Besnard, G.; Garros, X.; Andrieu, F.; Nguyen, P.; Van Den Daele, W.; Reynaud, P.; Schwarzenbach, W.; Delprat, D.; Bourdelle, K.K.; Reimbold, G.; Cristoloveanu, S.

Publisher: IEEE

Year: 2014

A Complete Characterization and Modeling of the BTI-Induced Dynamic Variability of SRAM Arrays in 28-nm FD-SOI Technology

Type: Journal Paper

Author : El Husseini, J.; Garros, X.; Cluzel, J.; Subirats, A.; Makosiej, A.; Weber, O.; Thomas, O.; Huard, V.; Federspiel, X.; Reimbold, G.

Publisher: IEEE

Year: 2014

FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration

Type: Conference Paper

Author : Fenouillet-Beranger, C.; Previtali, B.; Batude, P.; Nemouchi, F.; Casse, M.; Garros, X.; Tosti, L.; Rambal, N.; Lafond, D.; Dansas, H.; Pasini, L.; Brunet, L.; Deprat, F.; Gregoire, M.; Mellier, M.; Vinet, M.

Publisher: IEEE

Year: 2014

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CMOS V<inf>T</inf> characterization by capacitance measurements in FDSOI PIN gated diodes

Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes

A Complete Characterization and Modeling of the BTI-Induced Dynamic Variability of SRAM Arrays in 28-nm FD-SOI Technology

FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration

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CMOS V<inf>T</inf> characterization by capacitance measurements in FDSOI PIN gated diodes

Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes

A Complete Characterization and Modeling of the BTI-Induced Dynamic Variability of SRAM Arrays in 28-nm FD-SOI Technology

FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration