In this paper, an active CMOS rectifier with new delay compensation technique for wireless power transmission system (WPT) is proposed. In order to reduce the delays of the comparators employed in the proposed rectifier, ...

M–2M current digital-to-analog converter (DAC) is one of the best architectures for the implantable stimulation systems where the available area near the tissue is restricted. However, due to the nonlinear behavior of ...

المان¬های تاخیر یکی از اجزای اصلی در بسیاری از مدارات مبتنی بر زمان از جمله مبدل¬های آنالوگ به دیجیتال حوزه زمان می-باشند. از مهمترین ویژگی¬های یک المان تاخیر، خطی¬بودن مشخصه ولتاژ– تاخیر آن می¬باشدکه هرچه این مشخصه خطی¬تر ...

In this paper, the effect of capacitor non-linearity

on the linearity of a pipelined ADC is analyzed. First, the effect

of capacitor non-linearity on the characteristics of a 1.5-bit

residue stage is ...

In this paper, the structure of a binary-weighted capacitive digital-to-analog converter (DAC) in a successive-approximation analog-to-digital converter (SA-ADC) is modified to a unary or segmented configuration to reduce ...

This paper presents a power-efficient voltage level-shifter architecture capable of converting extremely low levels of input voltages to higher levels. In order to avoid the static power dissipation, the proposed structure ...