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Design Guidelines for High-Speed Two-Stage CMOS Operational Amplifiers
Year: 2007
Abstract:
This paper presents a well-defined procedure for the design of high-speed two-stage CMOS operational amplifiers. Cascode-compensated amplifiers with good trade-offs between speed, power and stability that make them suitable ...
ON THE POWER EFFICIENCY OF CASCODE COMPENSATION OVER MILLER COMPENSATION IN TWO-STAGE OPERATIONAL AMPLIFIERS
Year: 2008
Abstract:
Optimization of power consumption is one of the main design challenges in today’s lowpower
high-speed analog integrated circuits. In this paper, two popular techniques to
stabilize two-stage operational ...