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Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements

Type: Journal Paper

Author : Nunez, Juan; Avedillo, Maria J.; Quintana, Jose M.

Publisher: IEEE

Year: 2014

Semi-adaptive harmonic control for power balancing device for AC traction

Type: Conference Paper

Author : Akagi, M. , Tsuruta, H. , Oso, H.

Publisher: IEEE

Year: 2014

A simple ion concentration measurement system using a microfluidic device with ISFET sensors

Type: Conference Paper

Author : Miura, Tsuyoshi; Yamada, Akira

Publisher: IEEE

Year: 2014

Author

Akagi, M. , Tsuruta, H. , Oso, H. (1)

Avedillo, Maria J. (1)

Miura, Tsuyoshi (1)

Nunez, Juan (1)

Quintana, Jose M. (1)

Yamada, Akira (1)

Publisher

IEEE (3)

Year

2014 (3)

Keywords

CMOS logic circuits (3)

clocks (2)

clock bias (1)

Clock schemes (1)

Clocks (1)

CMOS integrated circuits (1)

CMOS process (1)

dynamic circuit scheme (1)

dynamic ternary inverter (1)

Educational institutions (1)

Type

Conference Paper (2)

Journal Paper (1)

Language (ISO)

English (3)

Content Type

Metadata Only (3)

Publication Title

icro-NanoMechatronics and Human Science (MHS), 2014 International Symposium on (1)

ower Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International (1)

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on (1)

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