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Low Energy Write Operation for 1T-1MTJ STT-RAM Bitcells with Negative Bitline Technique
Year: 2016
Abstract:
In this brief, a new write assist technique is proposed to improve the write characteristics of 1T-1MTJ STT-RAM bitcell through a symmetric write operation. This is done by applying a negative voltage to the bitline during write ‘1’ operation...
Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction
Publisher: IEEE
Year: 2014
STT-RAM Energy Reduction Using Self-Referenced Differential Write Termination Technique
Year: 2017
Abstract:
density (of dynamic RAM), and nonvolatility
(of flash memories). However, the write operation in the 1T-1MTJ STT-RAM bitcell is asymmetric and stochastic, which leads to high energy consumption and long latency. In this paper, a new write assist...
Separated Precharge Sensing Amplifier for Deep Submicrometer MTJ/CMOS Hybrid Logic Circuits
Publisher: IEEE
Year: 2014
Compact Modeling of a Magnetic Tunnel Junction Based on Spin Orbit Torque
Publisher: IEEE
Year: 2014
Adaptive Compact Magnetic Tunnel Junction Model
Publisher: IEEE
Year: 2014
Privacy-preserving population-enhanced biometric key generation from free-text keystroke dynamics
Publisher: IEEE
Year: 2014
Tunable MEMS fiber scanner for confocal microscopy
Publisher: IEEE
Year: 2014
Unintentional Insider Threat: Contributing Factors, Observables, and Mitigation Strategies
Publisher: IEEE
Year: 2014
Secret communication using Public Key steganography
Publisher: IEEE
Year: 2014