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RISA 10-Gb/s Low-Power Low-Voltage CTLE Using Gate and Bulk Driven Transistors
Year: 2016
Abstract:
The continuous time linear equalizer (CTLE) which compensates for the high frequency loss of electrical channels is one of the key components in the design of digital serializer / desrializer (SerDes) circuits. A new technique is described...
The beam vertical focusing at injection on the centre of isochronous cyclotron
Publisher: IEEE
Year: 2014
Compiler-driven dynamic reliability management for on-chip systems under variabilities
Publisher: IEEE
Year: 2014
A layered approach for testing timing in the model-based implementation
Publisher: IEEE
Year: 2014
Defect evaluation using the phase information of an EC-GMR sensor
Publisher: IEEE
Year: 2014
Model on Transportation Demand Distribution
Publisher: IEEE
Year: 2014
Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems
Publisher: IEEE
Year: 2014
Bridging the Gap between Spatial Data Sources and Mashup Applications
Publisher: IEEE
Year: 2014