Design of low cost fault tolerant analog circuits using real-time learned error compensation
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Year
: 2014DOI: 10.1109/VTCSpring.2014.7022889
Keyword(s): Accuracy,Educational institutions,Estimation,Indexes,Noise level,Signal processing algorithms,Wireless sensor networks
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Design of low cost fault tolerant analog circuits using real-time learned error compensation
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| contributor author | Banerjee, S. , Gomez-Pau, A. , Chatterjee, A. | |
| date accessioned | 2020-03-12T20:02:29Z | |
| date available | 2020-03-12T20:02:29Z | |
| date issued | 2014 | |
| identifier other | 6847838.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/999576?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Design of low cost fault tolerant analog circuits using real-time learned error compensation | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8119954 | |
| subject keywords | Accuracy | |
| subject keywords | Educational institutions | |
| subject keywords | Estimation | |
| subject keywords | Indexes | |
| subject keywords | Noise level | |
| subject keywords | Signal processing algorithms | |
| subject keywords | Wireless sensor networks | |
| identifier doi | 10.1109/VTCSpring.2014.7022889 | |
| journal title | est Symposium (ETS), 2014 19th IEEE European | |
| filesize | 218830 | |
| citations | 0 |


