| date accessioned | 2020-03-12T19:46:37Z | |
| date available | 2020-03-12T19:46:37Z | |
| date issued | 2014 | |
| identifier other | 6818769.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/989700?show=full | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Extraction of threshold voltage degradation modeling due to Negative Bias Temperature Instability in circuits with I/O measurements | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8105962 | |
| subject keywords | Educational institutions | |
| subject keywords | Fault currents | |
| subject keywords | Impedance | |
| subject keywords | Switches | |
| subject keywords | Transient analysis | |
| subject keywords | Wavelet transforms | |
| subject keywords | High impedance fault | |
| subject keywords | arcing | |
| subject keywords | capacitor switching | |
| subject keywords | magnetizing inrush | |
| subject keywords | wavelet transform | |
| identifier doi | 10.1109/AUPEC.2014.6966629 | |
| journal title | LSI Test Symposium (VTS), 2014 IEEE 32nd | |
| filesize | 1964461 | |
| citations | 1 | |
| contributor rawauthor | Soonyoung Cha , Chang-Chih Chen , Taizhi Liu , Milor, L.S. | |
