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Asymmetric aging of clock networks in power efficient designs

date accessioned2020-03-12T19:37:35Z
date available2020-03-12T19:37:35Z
date issued2014
identifier other6783365.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/984064?show=full
formatgeneral
languageEnglish
publisherIEEE
titleAsymmetric aging of clock networks in power efficient designs
typeConference Paper
contenttypeMetadata Only
identifier padid8099421
subject keywordspower generation control
subject keywordspower grids
subject keywordsvoltage regulators
subject keywordswind power plants
subject keywordsWSCR
subject keywordscontroller setting tuning
subject keywordslarge-scale wind plant integration
subject keywordsneighboring plant coordination
subject keywordsoptimal synchronous condenser ratings
subject keywordspower system
subject keywordssystem strength evaluation
subject keywordsvoltage stability perspective
subject keywordsweak grid
subject keywordsweighted short circuit ratio
subject keywordswind generation
subject keywordsCircuit stability
subject keywordsEducational institutions
subject keywordsPower system dynamics
subject keywordsPower system stability
subject keywordsStability criteria
subject keywordsThyristors
subject keywordsShort circuit ratio
subject keywordsSynchr
identifier doi10.1109/PESGM.2014.6939043
journal titleuality Electronic Design (ISQED), 2014 15th International Symposium on
filesize478036
citations0
contributor rawauthorArasu, S. , Nourani, M. , Cano, F. , Carulli, J.M. , Reddy, V.


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