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An FPGA-Based Novel Architecture for the Fixed-Point Binary Antilogarithmic Computation

date accessioned2020-03-12T19:31:03Z
date available2020-03-12T19:31:03Z
date issued2014
identifier other6745340.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/980360?locale-attribute=fa&show=full
formatgeneral
languageEnglish
publisherIEEE
titleAn FPGA-Based Novel Architecture for the Fixed-Point Binary Antilogarithmic Computation
typeConference Paper
contenttypeMetadata Only
identifier padid8094663
subject keywordscognitive radio
subject keywordscompressed sensing
subject keywordsenergy conservation
subject keywordsradio spectrum management
subject keywordssignal detection
subject keywordssignal sampling
subject keywordstelecommunication power management
subject keywordsDSA
subject keywordscognitive radio networks
subject keywordscompressive sampling
subject keywordscompressive sensing
subject keywordsconventional sampling
subject keywordscyclostationary feature detection
subject keywordsdynamic spectrum access
subject keywordsenergy efficiency
subject keywordsfixed spectrum allocation policy
subject keywordsgreen wireless communications
subject keywordssignal acquisition
subject keywordsspectrum sensing
subject keywordsCognitive radio
subject keywordsCompressed sensing
subject keywordsCorrelation
subject keywordsEnergy efficien
identifier doi10.1109/ICCCI.2014.6921829
journal titlelectronic Systems, Signal Processing and Computing Technologies (ICESC), 2014 International Conferen
filesize864535
citations0
contributor rawauthorPandey, J.G. , Karmakar, A. , Shekhar, C. , Gurunarayanan, S.


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