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Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates

contributor authorKukner, Halil
contributor authorKhan, Sharifullah
contributor authorWeckx, Pieter
contributor authorRaghavan, Praveen
contributor authorHamdioui, Said
contributor authorKaczer, Ben
contributor authorCatthoor, Francky
contributor authorVan der Perre, Liesbet
contributor authorLauwereins, Rudy
contributor authorGroeseneken, Guido
date accessioned2020-03-12T18:24:07Z
date available2020-03-12T18:24:07Z
date issued2014
identifier issn1530-4388
identifier other6529142.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/957250?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleComparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates
typeJournal Paper
contenttypeMetadata Only
identifier padid7989459
subject keywordsCMOS logic circuits
subject keywordsageing
subject keywordslogic gates
subject keywordsnegative bias temperature instability
subject keywordsCMOS logic gates
subject keywordsCPU time
subject keywordsTDDM
subject keywordsatomistic trap-based BTI models
subject keywordsbias temperature instability
subject keywordsdeeply scaled CMOS technology
subject keywordsduty factor
subject keywordsgate drive strength
subject keywordslong-term aging
subject keywordsmemory usage
subject keywordsreaction-diffusion
subject keywordsreliability
subject keywordstime-dependent degradation mechanisms
subject keywordsAtomistic trapping
subject keywordsDegradation
subject keywordsReaction-diffusion models
subject keywordsAtomistic trap-based model
subject keywordsBTI
subject keywordsdegradation
subject keywordsreaction-diffusion model
subject keywordsreliability
identifier doi10.1109/TDMR.2013.2267274
journal titleDevice and Materials Reliability, IEEE Transactions on
journal volume14
journal issue1
filesize1064851
citations0


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