Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis
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Year
: 2014DOI: 10.1109/TC.2012.294
Keyword(s): logic design,network routing,network-on-chip,NoC topology synthesis method,application-specific network-on-chip topology synthesis,implementation diversity,logic synthesis,partial connection,power consumption,routers,technology mapping,IP networks,Libraries,Network topology,Routing,System-on-a-chip,Topology,On-chip networks,architecture,synthesis,system-on-chip (SoC)
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Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis
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| contributor author | Minje Jun | |
| contributor author | Ro, Won Woo | |
| contributor author | Eui-Young Chung | |
| date accessioned | 2020-03-12T18:21:08Z | |
| date available | 2020-03-12T18:21:08Z | |
| date issued | 2014 | |
| identifier issn | 0018-9340 | |
| identifier other | 6392835.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/955620 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 7987317 | |
| subject keywords | logic design | |
| subject keywords | network routing | |
| subject keywords | network-on-chip | |
| subject keywords | NoC topology synthesis method | |
| subject keywords | application-specific network-on-chip topology synthesis | |
| subject keywords | implementation diversity | |
| subject keywords | logic synthesis | |
| subject keywords | partial connection | |
| subject keywords | power consumption | |
| subject keywords | routers | |
| subject keywords | technology mapping | |
| subject keywords | IP networks | |
| subject keywords | Libraries | |
| subject keywords | Network topology | |
| subject keywords | Routing | |
| subject keywords | System-on-a-chip | |
| subject keywords | Topology | |
| subject keywords | On-chip networks | |
| subject keywords | architecture | |
| subject keywords | synthesis | |
| subject keywords | system-on-chip (SoC) | |
| identifier doi | 10.1109/TC.2012.294 | |
| journal title | Computers, IEEE Transactions on | |
| journal volume | 63 | |
| journal issue | 6 | |
| filesize | 2250389 | |
| citations | 0 |