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contributor authorKoji Inoueen
contributor authorحمید نوریen
contributor authorFarhad Mehdipouren
contributor authorTakaaki Hanadaen
contributor authorKazuaki Murakamien
contributor authorHamid Noorifa
date accessioned2020-06-06T14:04:53Z
date available2020-06-06T14:04:53Z
date copyright11/22/2009
date issued2009
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/3381598?show=full
description abstractThis paper introduces an energy efficient acceleration

technique for embedded microprocessors. By means of

supporting an ALU-array based coarse-grain reconfigurable

functional unit, well customized special instructions are identified

and executed for each application program. Since the

reconfigurable functional unit can execute several dependent

instructions (a sequence of instructions), simultaneously, the

performance of the base microprocessor can dramatically be

improved. In addition, this kind of direct execution is very energy

efficient because it reduces activation counts of hardware

components such as instruction cache, branch predictor,

register-file accesses, and so on.
en
languageEnglish
titleALU-Array based Reconfigurable Accelerator for Energy Efficient Executionsen
typeConference Paper
contenttypeExternal Fulltext
subject keywordsreconfigurable computingen
subject keywordsaccelerationen
subject keywordsenergy-efficient executionen
identifier linkhttps://profdoc.um.ac.ir/paper-abstract-1026434.html
conference titleInternational Conference on SoC Design Conference (ISOCCen
conference locationBusanfa
identifier articleid1026434


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