A 0.1–20 GHz Low-Power Self-Biased Resistive-Feedback LNA in 90 nm Digital CMOS
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: 2009DOI: 10.1109/LMWC.2009.2017608
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A 0.1–20 GHz Low-Power Self-Biased Resistive-Feedback LNA in 90 nm Digital CMOS
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| contributor author | Chen, M. | |
| contributor author | Lin, J. | |
| date accessioned | 2020-03-15T23:55:03Z | |
| date available | 2020-03-15T23:55:03Z | |
| date issued | 2009 | |
| identifier other | Ee2JfIniIhhPFT2Enee4jfD103OYRvWxpAr7aPjwZt5lP41A56.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/2098997 | |
| format | general | |
| language | English | |
| title | A 0.1–20 GHz Low-Power Self-Biased Resistive-Feedback LNA in 90 nm Digital CMOS | |
| type | Journal Paper | |
| contenttype | Fulltext | |
| contenttype | Fulltext | |
| identifier padid | 14376592 | |
| identifier doi | 10.1109/LMWC.2009.2017608 | |
| coverage | Academic | |
| pages | 323-325 | |
| journal volume | 19 | |
| journal issue | 5 | |
| filesize | 515528 | |
| citations | 1 |